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1. general description the hef4021b is an 8-bit static shift register (parallel-to-serial converter) with a synchronous serial data input (ds), a clock input (cp), an asynchronous active high parallel load input (pl), eight asynchronous parallel data inputs (d0 to d7) and buffered parallel outputs from the last three stages (q5 to q7). each register stage is a d-type master-slave f lip-flop with a set direct (sd) and clear direct (cd) input. information on d0 to d7 is asynch ronously loaded into th e register while pl is high, independent of cp and ds. when pl is low, data on ds is shifted into the first register position and all the data in the register is shifted one position to the right on the low-to-high transition of cp. schmitt trigger ac tion makes the clock in put highly tolerant of slower rise and fall times. it operates over a recommended v dd power supply range of 3 v to 15 v referenced to v ss (usually ground). unused inputs must be connected to v dd , v ss , or another input. 2. features and benefits ? tolerant of slower rise and fall times ? fully static operation ? 5 v, 10 v, and 15 v parametric ratings ? standardized symmetrical output characteristics ? specified from ? 40 ? c to +125 ? c ? complies with jedec standard jesd 13-b 3. ordering information hef4021b 8-bit static shift register rev. 9 ? 30 august 2013 product data sheet table 1. ordering information all types operate from ? 40 ? c to +125 ? c. type number package version name description hef4021bp dip16 plastic dual in-line package; 16 leads (300 mil) sot38-4 hef4021bt so16 plastic small outline package; 16 leads; body width 3.9 mm sot109-1 HEF4021BTT tssop16 plastic thin shrink small out line package; 16 leads; body width 4.4 mm sot403-1
hef4021b all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 9 ? 30 august 2013 2 of 16 nxp semiconductors hef4021b 8-bit static shift register 4. functional diagram fig 1. functional diagram fig 2. logic diagram 001aae608 d cp shift register 8-bits 11 10 ds 9pl cp sd/cd 7 d0 6 d1 5 d2 4 d3 13 d4 14 d5 15 d6 1 d7 2 q5 12 q6 3 q7 d0 sd d cp cd o ff 1 sd d cp cd o ff 6 sd d cp cd o ff 7 sd d cp cd o ff 8 ds pl cp d5 d6 d7 q5 q6 q7 001aae610
hef4021b all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 9 ? 30 august 2013 3 of 16 nxp semiconductors hef4021b 8-bit static shift register 5. pinning information 5.1 pinning 5.2 pin description 6. functional description fig 3. pin configuration hef4021b d7 v dd q5 d6 q7 d5 d3 d4 d2 q6 d1 ds d0 cp v ss pl 001aae609 1 2 3 4 5 6 7 8 10 9 12 11 14 13 16 15 table 2. pin description symbol pin description q5 to q7 2, 12, 3 buffered parallel output from the last three stages d0 to d7 7, 6, 5, 4, 13, 14,15, 1 parallel data input v ss 8 ground supply voltage pl 9 parallel load input cp 10 clock input (low-to-high edge-triggered) ds 11 serial data input v dd 16 supply voltage table 3. function table [1] number of clock transitions inputs outputs cp ds pl q5 q6 q7 serial operation 1 ? data 1 l x x x 2 ? data 2 l x x x 3 ? data 3 l x x x 6 ? xl data1xx 7 ? x l data 2 data 1 x
hef4021b all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 9 ? 30 august 2013 4 of 16 nxp semiconductors hef4021b 8-bit static shift register [1] h = high voltage level; l = low voltage level; x = don?t care; ? = low to high clock transition; ?? = high to low clock transition; data n = data (high or low) on the ds input at the n th ? cp transition. 7. limiting values [1] for dip16 package: p tot derates linearly with 12 mw/k above 70 ? c. [2] for so16 package: p tot derates linearly wi th 8 mw/k above 70 ? c. for tssop16 package: p tot derates linearly with 5.5 mw/k above 60 ? c. 8. recommended operating conditions 8 ? x l data 3 data 2 data 1 ? x l no change no change no change parallel operation x x h d5 d6 d7 table 3. function table [1] ?continued number of clock transitions inputs outputs cp ds pl q5 q6 q7 table 4. limiting values in accordance with the absolute ma ximum rating system (iec 60134). symbol parameter conditions min max unit v dd supply voltage ? 0.5 +18 v i ik input clamping current v i < ? 0.5 v or v i >v dd + 0.5 v - ? 10 ma v i input voltage ? 0.5 v dd + 0.5 v i ok output clamping current v o < ? 0.5 v or v o >v dd + 0.5 v - ? 10 ma i i/o input/output current - ? 10 ma i dd supply current - 50 ma t stg storage temperature ? 65 +150 ?c t amb ambient temperature ? 40 +125 ?c p tot total power dissipation t amb ? 40 ? c to +125 ?c dip16 package [1] -7 5 0m w so16 and tssop16 package [2] -5 0 0m w p power dissipation per output - 100 mw table 5. recommended operating conditions symbol parameter conditions min typ max unit v dd supply voltage 3 - 15 v v i input voltage 0 - v dd v t amb ambient temperature in free air ? 40 - +125 ?c ? t/ ? v input transition rise and fall rate v dd = 5 v --3.75 ? s/v v dd = 10 v --0.5 ? s/v v dd = 15 v --0.08 ? s/v
hef4021b all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 9 ? 30 august 2013 5 of 16 nxp semiconductors hef4021b 8-bit static shift register 9. static characteristics 10. dynamic characteristics table 6. static characteristics v ss = 0 v; v i = v ss or v dd unless otherwise specified. symbol parameter conditions v dd t amb = ? 40 ?c t amb = 25 ? c t amb = 85 ? c t amb = 125 ?c unit min max min max min max min max v ih high-level input voltage ? i o ? < 1 ? a 5 v 3.5 - 3.5 - 3.5 - 3.5 - v 10 v 7.0 - 7.0 - 7.0 - 7.0 - v 15 v 11.0 - 11.0 - 11.0 - 11.0 - v v il low-level input voltage ? i o ? < 1 ? a 5 v - 1.5 - 1.5 - 1.5 - 1.5 v 10 v - 3.0 - 3.0 - 3.0 - 3.0 v 15 v - 4.0 - 4.0 - 4.0 - 4.0 v v oh high-level output voltage ? i o ? < 1 ? a 5 v 4.95 - 4.95 - 4.95 - 4.95 - v 10 v 9.95 - 9.95 - 9.95 - 9.95 - v 15 v 14.95 - 14.95 - 14.95 - 14.95 - v v ol low-level output voltage ? i o ? < 1 ? a 5 v - 0.05 - 0.05 - 0.05 - 0.05 v 10 v - 0.05 - 0.05 - 0.05 - 0.05 v 15 v - 0.05 - 0.05 - 0.05 - 0.05 v i oh high-level output current v o = 2.5 v 5 v - ? 1.7 - ? 1.4 - ? 1.1 - ? 1.1 ma v o = 4.6 v 5 v - ? 0.64 - ? 0.5 - ? 0.36 - ? 0.36 ma v o = 9.5 v 10 v - ? 1.6 - ? 1.3 - ? 0.9 - ? 0.9 ma v o = 13.5 v 15 v - ? 4.2 - ? 3.4 - ? 2.4 - ? 2.4 ma i ol low-level output current v o = 0.4 v 5 v 0.64 - 0.5 - 0.36 - 0.36 - ma v o = 0.5 v 10 v 1.6 - 1.3 - 0.9 - 0.9 - ma v o = 1.5 v 15 v 4.2 - 3.4 - 2.4 - 2.4 - ma i i input leakage current v dd = 15 v 15 v - ? 0.1 - ? 0.1 - ? 1.0 - ? 1.0 ? a i dd supply current i o = 0 a 5 v - 5 - 5 - 150 - 150 ? a 10 v - 10 - 10 - 300 - 300 ? a 15 v - 20 - 20 - 600 - 600 ? a c i input capacitance - ---7.5----pf table 7. dynamic characteristics v ss = 0 v; t amb = 25 ? c; for test circuit see figure 7 ; unless otherwise specified. symbol parameter conditions v dd extrapolation formula min typ max unit t phl high to low propagation delay cp to qn see figure 4 5 v [1] 98 ns + (0.55 ns/pf)c l - 125 250 ns 10 v 44 ns + (0.23 ns/pf)c l -55110ns 15 v 32 ns + (0.16 ns/pf)c l -4080ns pl to qn see figure 4 5 v 93 ns + (0.55 ns/pf)c l - 120 240 ns 10 v 44 ns + (0.23 ns/pf)c l -55110ns 15 v 32 ns + (0.16 ns/pf)c l -4080ns
hef4021b all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 9 ? 30 august 2013 6 of 16 nxp semiconductors hef4021b 8-bit static shift register [1] the typical values of the propagation delay and transition times are calculated from the extrapolation formulas shown (c l in pf). t plh low to high propagation delay cp to qn see figure 4 5 v [1] 88 ns + (0.55 ns/pf)c l - 115 230 ns 10 v 39 ns + (0.23 ns/pf)c l - 50 100 ns 15 v 32 ns + (0.16 ns/pf)c l -4080ns pl to qn see figure 4 5 v 78 ns + (0.55 ns/pf)c l - 105 210 ns 10 v 39 ns + (0.23 ns/pf)c l - 50 100 ns 15 v 32 ns + (0.16 ns/pf)c l -4080ns t t transition time qn; see figure 4 5 v [1] 10 ns + (1.00 ns/pf)c l - 60 120 ns 10 v 9 ns + (0.42 ns/pf)c l -3060ns 15 v 6 ns + (0.28 ns/pf)c l -2040ns t su set-up time ds to cp; see figure 5 5 v +25 ? 15 - ns 10 v +25 ? 10 - ns 15 v +15 ? 5- ns dn to pl; see figure 6 5 v 50 25 - ns 10 v 30 10 - ns 15 v 20 5 - ns t h hold time ds to cp; see figure 5 5 v 40 20 - ns 10 v 20 10 - ns 15 v 15 8 - ns dn to pl; see figure 6 5 v +15 ? 10 - ns 10 v 15 0 - ns 15 v 15 0 - ns t w pulse width cp = low; minimum width; see figure 5 5 v 70 35 - ns 10 v 30 15 - ns 15 v 24 12 - ns pl = high; minimum width; see figure 6 5 v 70 35 - ns 10 v 30 15 - ns 15 v 24 12 - ns t rec recovery time pl input; see figure 6 5 v 50 10 - ns 10 v 40 5 - ns 15 v 35 5 - ns f clk(max) maximum clock frequency cp input; see figure 5 5 v 6 13 - mhz 10 v 15 30 - mhz 15 v 20 40 - mhz table 7. dynamic characteristics ?continued v ss = 0 v; t amb = 25 ? c; for test circuit see figure 7 ; unless otherwise specified. symbol parameter conditions v dd extrapolation formula min typ max unit
hef4021b all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 9 ? 30 august 2013 7 of 16 nxp semiconductors hef4021b 8-bit static shift register 11. waveforms table 8. dynamic power dissipation p d p d can be calculated from the formulas shown. v ss = 0 v; t r = t f ? 20 ns; t amb = 25 ? c. symbol parameter v dd typical formula for p d ( ? w) where: p d dynamic power dissipation 5 v p d = 900 ? f i + ? (f o ? c l ) ? v dd 2 f i = input frequency in mhz, f o = output frequency in mhz, c l = output load capacitance in pf, v dd = supply voltage in v, ? (f o ? c l ) = sum of the outputs. 10 v p d = 4300 ? f i + ? (f o ? c l ) ? v dd 2 15 v p d = 12000 ? f i + ? (f o ? c l ) ? v dd 2 fig 4. waveforms showing propagation delays for cp and pl inputs to qn output and qn transition times fig 5. waveforms showing minimum clock pulse width, set-up time, and hold time for cp and ds. 001aaj060 t t cp or pl input qn output v m v dd v ss v oh v ol v m v x v y t t t phl t plh 001aae611 v m v dd v ss v dd v ss 1 / f clk(max) v m cp input ds input t su t h t w
hef4021b all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 9 ? 30 august 2013 8 of 16 nxp semiconductors hef4021b 8-bit static shift register set-up times and hold times are shown as positive values but may be specified as negative values; measurement points are given in table 9 . fig 6. waveforms showing minimum pulse width and recovery time for pl; set-up and hold times for dn to pl. 001aae612 t su t h t r t w t rec cp input pl input dn input v m v m v dd v ss v dd v ss v dd v ss v m 10 % 90 % t f table 9. measurement points supply voltage input output v dd v m v m v x v y 5 v to 15 v 0.5v dd 0.5v dd 0.1v dd 0.9v dd
hef4021b all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 9 ? 30 august 2013 9 of 16 nxp semiconductors hef4021b 8-bit static shift register a. input waveform b. test circuit test data is given in table 10 . definitions for test circuit: dut = device under test. c l = load capacitance including jig and probe capacitance. r t = termination resistance should be equal to the output impedance z o of the pulse generator. fig 7. test circuit for measuring switching times v m v m t w t w 10 % 90 % 10 % 90 % 0 v v i v i negative pulse positive pulse 0 v v m v m 90 % 10 % 90 % 10 % t f t r t r t f 001aaj781 v dd v i v o 001aag182 dut c l r t g table 10. test data supply voltage input load v dd v i t r , t f c l 5 v to 15 v v ss or v dd ? 20 ns 50 pf
hef4021b all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 9 ? 30 august 2013 10 of 16 nxp semiconductors hef4021b 8-bit static shift register 12. package outline fig 8. package outline sot38-4 (dip16) references outline version european projection issue date iec jedec jeita sot38-4 95-01-14 03-02-13 m h c (e ) 1 m e a l seating plane a 1 w m b 1 b 2 e d a 2 z 16 1 9 8 e pin 1 index b 0 5 10 mm scale note 1. plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included. unit a max. 12 b 1 (1) (1) (1) b 2 cd e e m z h l mm dimensions (inch dimensions are derived from the original mm dimensions) a min. a max. b max. w m e e 1 1.73 1.30 0.53 0.38 0.36 0.23 19.50 18.55 6.48 6.20 3.60 3.05 0.254 2.54 7.62 8.25 7.80 10.0 8.3 0.76 4.2 0.51 3.2 inches 0.068 0.051 0.021 0.015 0.014 0.009 1.25 0.85 0.049 0.033 0.77 0.73 0.26 0.24 0.14 0.12 0.01 0.1 0.3 0.32 0.31 0.39 0.33 0.03 0.17 0.02 0.13 dip16: plastic dual in-line package; 16 leads (300 mil) sot38-4
hef4021b all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 9 ? 30 august 2013 11 of 16 nxp semiconductors hef4021b 8-bit static shift register fig 9. package outline sot109-1 (so16) x w m a a 1 a 2 b p d h e l p q detail x e z e c l v m a (a ) 3 a 8 9 1 16 y pin 1 index unit a max. a 1 a 2 a 3 b p cd (1) e (1) (1) eh e ll p qz ywv mm inches 1.75 0.25 0.10 1.45 1.25 0.25 0.49 0.36 0.25 0.19 10.0 9.8 4.0 3.8 1.27 6.2 5.8 0.7 0.6 0.7 0.3 8 0 o o 0.25 0.1 dimensions (inch dimensions are derived from the original mm dimensions) note 1. plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. 1.0 0.4 sot109-1 99-12-27 03-02-19 076e07 ms-012 0.069 0.010 0.004 0.057 0.049 0.01 0.019 0.014 0.0100 0.0075 0.39 0.38 0.16 0.15 0.05 1.05 0.041 0.244 0.228 0.028 0.020 0.028 0.012 0.01 0.25 0.01 0.004 0.039 0.016 0 2.5 5 mm scale so16: plastic small outline package; 16 leads; body width 3.9 mm sot109-1
hef4021b all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 9 ? 30 august 2013 12 of 16 nxp semiconductors hef4021b 8-bit static shift register fig 10. package outline sot403-1 (tssop16) unit a 1 a 2 a 3 b p cd (1) e (2) (1) eh e ll p qz ywv references outline version european projection issue date iec jedec jeita mm 0.15 0.05 0.95 0.80 0.30 0.19 0.2 0.1 5.1 4.9 4.5 4.3 0.65 6.6 6.2 0.4 0.3 0.40 0.06 8 0 o o 0.13 0.1 0.2 1 dimensions (mm are the original dimensions) notes 1. plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. plastic interlead protrusions of 0.25 mm maximum per side are not included. 0.75 0.50 sot403-1 mo-153 99-12-27 03-02-18 w m b p d z e 0.25 18 16 9 tssop16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm sot403-1 a max. 1.1 pin 1 index
hef4021b all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 9 ? 30 august 2013 13 of 16 nxp semiconductors hef4021b 8-bit static shift register 13. revision history table 11. revision history document id release date data sheet status change notice supersedes hef4021b v.9 20130830 product data sheet - hef4021b v.8 modifications: ? added type number HEF4021BTT. hef4021b v.8 20111118 product data sheet - hef4021b v.7 modifications: ? legal pages updated. ? changes in ?general description? and ?features and benefits?. ? section ?applications? removed. hef4021b v.7 20111010 product data sheet - hef4021b v.6 hef4021b v.6 20091127 product data sheet - hef4021b v.5 hef4021b v.5 20090707 product data sheet - hef4021b v.4 hef4021b v.4 20081110 product data sheet - hef4021b_cnv v.3 hef4021b_cnv v.3 19950101 product specification - hef4021b_cnv v.2 hef4021b_cnv v.2 19950101 product specification - -
hef4021b all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 9 ? 30 august 2013 14 of 16 nxp semiconductors hef4021b 8-bit static shift register 14. legal information 14.1 data sheet status [1] please consult the most recently issued document before initiating or completing a design. [2] the term ?short data sheet? is explained in section ?definitions?. [3] the product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple device s. the latest product status information is available on the internet at url http://www.nxp.com . 14.2 definitions draft ? the document is a draft versi on only. the content is still under internal review and subject to formal approval, which may result in modifications or additions. nxp semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall hav e no liability for the consequences of use of such information. short data sheet ? a short data sheet is an extract from a full data sheet with the same product type number(s) and title. a short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. for detailed and full information see the relevant full data sheet, which is available on request vi a the local nxp semiconductors sales office. in case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. product specification ? the information and data provided in a product data sheet shall define the specification of the product as agreed between nxp semiconductors and its customer , unless nxp semiconductors and customer have explicitly agreed otherwis e in writing. in no event however, shall an agreement be valid in which the nxp semiconductors product is deemed to offer functions and qualities beyond those described in the product data sheet. 14.3 disclaimers limited warranty and liability ? information in this document is believed to be accurate and reliable. however, nxp semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such info rmation. nxp semiconductors takes no responsibility for the content in this document if provided by an information source outside of nxp semiconductors. in no event shall nxp semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. notwithstanding any damages that customer might incur for any reason whatsoever, nxp semiconductors? aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the terms and conditions of commercial sale of nxp semiconductors. right to make changes ? nxp semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. this document supersedes and replaces all information supplied prior to the publication hereof. suitability for use ? nxp semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an nxp semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. nxp semiconductors and its suppliers accept no liability for inclusion and/or use of nxp semiconducto rs products in such equipment or applications and therefore such inclusion and/or use is at the customer?s own risk. applications ? applications that are described herein for any of these products are for illustrative purpos es only. nxp semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. customers are responsible for the design and operation of their applications and products using nxp semiconductors products, and nxp semiconductors accepts no liability for any assistance with applications or customer product design. it is customer?s sole responsibility to determine whether the nxp semiconductors product is suitable and fit for the customer?s applications and products planned, as well as fo r the planned application and use of customer?s third party customer(s). customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. nxp semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer?s applications or products, or the application or use by customer?s third party customer(s). customer is responsible for doing all necessary testing for the customer?s applic ations and products using nxp semiconductors products in order to av oid a default of the applications and the products or of the application or use by customer?s third party customer(s). nxp does not accept any liability in this respect. limiting values ? stress above one or more limiting values (as defined in the absolute maximum ratings system of iec 60134) will cause permanent damage to the device. limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the recommended operating conditions section (if present) or the characteristics sections of this document is not warranted. constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. terms and conditions of commercial sale ? nxp semiconductors products are sold subject to the gener al terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms , unless otherwise agreed in a valid written individual agreement. in case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. nxp semiconductors hereby expressly objects to applying the customer?s general terms and conditions with regard to the purchase of nxp semiconducto rs products by customer. no offer to sell or license ? nothing in this document may be interpreted or construed as an offer to sell products t hat is open for acceptance or the grant, conveyance or implication of any lic ense under any copyrights, patents or other industrial or intellectual property rights. document status [1] [2] product status [3] definition objective [short] data sheet development this document contains data from the objecti ve specification for product development. preliminary [short] data sheet qualification this document contains data from the preliminary specification. product [short] data sheet production this document contains the product specification.
hef4021b all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 9 ? 30 august 2013 15 of 16 nxp semiconductors hef4021b 8-bit static shift register export control ? this document as well as the item(s) described herein may be subject to export control regu lations. export might require a prior authorization from competent authorities. non-automotive qualified products ? unless this data sheet expressly states that this specific nxp semicon ductors product is automotive qualified, the product is not suitable for automotive use. it is neither qualified nor tested in accordance with automotive testing or application requirements. nxp semiconductors accepts no liabili ty for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. in the event that customer uses t he product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without nxp semiconductors? warranty of the product for such automotive applicat ions, use and specifications, and (b) whenever customer uses the product for automotive applications beyond nxp semiconductors? specifications such use shall be solely at customer?s own risk, and (c) customer fully indemnifies nxp semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive app lications beyond nxp semiconductors? standard warranty and nxp semiconduct ors? product specifications. translations ? a non-english (translated) version of a document is for reference only. the english version shall prevail in case of any discrepancy between the translated and english versions. 14.4 trademarks notice: all referenced brands, produc t names, service names and trademarks are the property of their respective owners. 15. contact information for more information, please visit: http://www.nxp.com for sales office addresses, please send an email to: salesaddresses@nxp.com
nxp semiconductors hef4021b 8-bit static shift register ? nxp b.v. 2013. all rights reserved. for more information, please visit: http://www.nxp.com for sales office addresses, please se nd an email to: salesaddresses@nxp.com date of release: 30 august 2013 document identifier: hef4021b please be aware that important notices concerning this document and the product(s) described herein, have been included in section ?legal information?. 16. contents 1 general description . . . . . . . . . . . . . . . . . . . . . . 1 2 features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 ordering information . . . . . . . . . . . . . . . . . . . . . 1 4 functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 5 pinning information . . . . . . . . . . . . . . . . . . . . . . 3 5.1 pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 5.2 pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 6 functional description . . . . . . . . . . . . . . . . . . . 3 7 limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4 8 recommended operating conditions. . . . . . . . 4 9 static characteristics. . . . . . . . . . . . . . . . . . . . . 5 10 dynamic characteristics . . . . . . . . . . . . . . . . . . 5 11 waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 12 package outline . . . . . . . . . . . . . . . . . . . . . . . . 10 13 revision history . . . . . . . . . . . . . . . . . . . . . . . . 13 14 legal information. . . . . . . . . . . . . . . . . . . . . . . 14 14.1 data sheet status . . . . . . . . . . . . . . . . . . . . . . 14 14.2 definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 14.3 disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 14.4 trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 15 15 contact information. . . . . . . . . . . . . . . . . . . . . 15 16 contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

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